Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/NXP Semiconductors/LPC11E6x/SCT0/EVEN#0x0
SCT event enable register
The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,…, event 5 = bit 5).
Reserved
https://github.com/cmsis-svd/cmsis-svd-data